Part Number Hot Search : 
HAT2099H SSP7431P B1608 MC232 44MHZ 12100 HT1620 E005703
Product Description
Full Text Search
 

To Download SAB82525 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 High-Level Serial Communications Controller Extended (HSCX)
SAB 82525 SAB 82526
General Description The HSCX (SAB 82525) has been designed to implement high speed communication links using HDLC protocols and to reduce the hard and software overhead needed for serial synchronous communications. Due to its 8-bit demultiplexed adaptive bus interface it fits perfectly into every INTEL or Motorola 8- and 16-bit microcomputer system. The HSCX directly supports the X.25 LAPB, the ISDN LAPDand SDLC protocols and is capable of handling a large set of layer-2 protocol functions independently from the host processor. The time division capability of the SAB 82525 and other programmable telecom features make it suitable for time-slot oriented PCM systems designed for packet switching. Due to its high speed data transfer and high level protocol support it fits very well in industrial applications e.g. Iaser printers. The HSCX1 (SAB 82526), the single channel version of the HSCX, opens another wide application area. For an easy access to the wide variety and complexity of synchronous data transfer Siemens provides a PC based HSCX evaluation Kit. The SAB 82525/82526 operates in the temperature range 0 to 70 C, the SAF 82525/82526 in the range -40 to 85 C.
Type SAB 82525-N SAF 82525-N SAB 82526-N SAF 82526-N SAB 82525-H Features SAB 82525 (82526)
Package P-LCC-44-1 (SMD) P-LCC-44-1 (SMD) P-LCC-44-1 (SMD) P-LCC-44-1 (SMD) P-MQFP-44-1 (SMD)
Two (one) independent HDLC/SDLC channels High level support of LAPB/LAPD protocols Oscillator DPLL and baud rate generator for each channel Collision detect and resolution logic Data rate up to 4 Mbit/s Clock recovery up to 1.2 Mbit/s 8 bit parallel multiplexed and demultiplexed system bus adaption * 64-byte FIFO per channel and direction * 4 (2) channel DMA interface * CMOS technology
* * * * * * *
A0- A6 D0- D7 RD / IC1 WR / IC0 CS ALE / IM0 INT RES IM1 DRQTA DRQRA DACKA DRQTB DRQRB DACKB
Block Diagram
Channel A SP-REG LAP Controller Decoder Collision Detection DPLL BRG TSA RxCLKA Clock Control AxCLKA TxCLKA RxDA TxDA RTSA CTSA / CxDA
Transmit FIFO P Bus Interface Receive FIFO
Data Link Controller
TxCLKB AxCLKB RxCLKB DMA Interface CTSB / CxDB RTSB TxDB RxDB
ITB00946
Channel B
Siemens Aktiengesellschaft
1


▲Up To Search▲   

 
Price & Availability of SAB82525

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X